1.25/2.5-Gb/s Dual Bit-Rate Burst-Mode Clock Recovery Circuits in 0.18- μħbox m CMOS Technology
نویسندگان
چکیده
—A burst-mode clock recovery circuit with a novel dual bit-rate structure is presented. It utilizes two gated-oscillators to align clock with data edges and can operate in half-rate clocking mode, doubling data throughput, as well as in full-rate clocking mode. The gated-oscillator reset-phase control scheme causes the starting phase of gated-oscillators to alternate repeatedly between 0° and 180° according to the current clock phase. A prototype chip was designed with 0.18-μm CMOS technology and 1.25/2.5-Gb/s dual-mode operation was verified in measurement
منابع مشابه
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ورودعنوان ژورنال:
- IEEE Trans. on Circuits and Systems
دوره 54-II شماره
صفحات -
تاریخ انتشار 2007